Adding Functional Value to a CMOS Image Sensor that Exceeds Human Vision!
Back-illuminated and stacked structure provide advanced functionality
Stacked CMOS Image Sensor is a Sony’s CMOS image sensor that adopts a unique ‘stacked structure.’ This structure layers the pixel section, containing formations of back-illuminated pixels over the chip affixed with mounted circuits for signal processing, in place of conventional supporting substrates used for back-illuminated CMOS image sensors.
Conventional CMOS image sensors mount the pixel section and analog logic circuit on top of the same chip, which require numerous constraints when wishing to mount the large-scale circuits such as measures to counter the circuit scale and chip size, measures to suppress noise caused by the layout of the pixel and circuit sections, and optimizing the characteristics of pixels and circuit transistors.
Sony has succeeded in establishing a structure that layers the pixel section containing formations of back-illuminated structure pixels over the chip affixed with mounted circuits for signal processing, which is in place of supporting substrates used for conventional back-illuminated CMOS image sensors. By this stacked structure, large-scale circuits can now be mounted keeping small chip size. Furthermore, as the pixel section and circuit section are formed as independent chips, a manufacturing process can be adopted, enabling the pixel section to be specialized for higher image quality while the circuit section can be specialized for higher functionality, thus simultaneously achieving higher image quality, superior functionality and a more compact size. In addition, faster signal processing and lower power consumption can also be achieved through the use of leading process for the chip containing the circuits.